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 Bihar Board Class 12 Physics Solutions Chapter 14 Semiconductor Electronics: Materials, Devices and Simple Circuits

Bihar Board Class 12 Physics Semiconductor Electronics: Materials, Devices and Simple Circuits Textbook Questions and Answers

Question 1.
In an n-type silicon, which of the following statement is true –
(a) Electrons are majority carriers and trivalent atoms are the dopants.
(b) Electrons are minority carriers and pentavalent atoms are the dopants.
(c) Holes are minority carriers and pentavalent atoms are the dopants.
(d) Holes are majority carriers and trivalent atoms are the dopants.
Answer:
(c) Holes are minority carriers and pentavalent atoms are the dopants.

Question 2.
Which of the statement given in Exercise 14.1 is true for p-type semiconductors?
Answer:
(b) Holes are majority carriers and trivalent atoms are the dopants.

Question 3.
Carbon, silicon and germanium have four valence electrons each. These are characterised by valence and conduction bands separated by energy band gap respectively equal to (Eg)c, (Eg )si and (Eg)Ge  Which of the following statements is true?
(a) (Eg)si. < (Eg)Ge < (Eg)C
(b) (Eg)C<(Eg)Ge< (Eg)si 
(c) (Eg)C > (Eg)si > (Eg)Ge
(d) (Eg)C = (Eg)si > = (Eg)Ge
Answer:
(c) (Eg)C>(Eg)si>(Eg)Ge

Question 4.
In an unbiased p-n junction, holes diffuse from the p- region to n-region because
(a) free electrons in the n-region attract them.
(b) they move across the junction by the potential difference.
(c) hole concentration in p-region is more as compared to n- region.
(d) All the above.
Answer:
(c) Hole concentration in p-region is more as compared to n-region.

Question 5.
When a forward bias is applied to p-n junction, it
(a) raises the potential barrier.
(b) reduces the majority carrier current to zero.
(c) lowers the potential barrier.
(d) None of the above
Answer:
(c) Lowers the potential barrier.

Question 6.
For transistor action, which of the following statements are correct:
(a) Base, emitter and collector regions should have similar size and doping concentrations.
(b) The base region must be very thin and lightly doped.
(c) The emitter junction is forward biased and collector junction is reverse biased. .
(d) Both the emitter junction as well as the collector junction are forward biased.
Answer:
(b) The base region must be very thin and lightly doped.
(c) The emitter junction is forward biased and collector junction is reverse biased.

Question 7.
For a transistor amplifier, the voltage gain
(a) remains constant for all frequencies.
(b) is high at high and low frequencies and constant in the middle frequency range.
(c) is low at high and low frequencies and constant at mid frequencies.
(d) None of the above
Answer:
(c) Is low at high and low frequencies and constant at mid frequencies.

Question 8.
In half-wave rectification, what is the output frequency if the input frequency is 50 Hz. What is the output frequency of a full-wave rectifier for the same input frequency.
Answer:
A half wave rectifier rectifies only the half of the A.C. input i.e. it conducts once during an A.C. input cycle.
∴ frequency of A.C output = frequency of A.C input = 50 Hz.
On the other hand, a full-wave rectifier rectifies both the half cycles of the A.C. input i.e. it conducts twice during a cycle.
So frequency of A.C. output = 2 x frequency of A.C. Input.
= 2 x 50 = 100 Hz.

Question 9.
For a CE-transistor amplifier, the audio signal voltage across the collected resistance of 2 KΩ is 2 V, Suppose the current amplification factor of the transistor is 100, find the input signal voltage and base current, if the base resistance is 1KΩ.
Answer:
Here, (P) = current gain = 100
Ri = input (base) resistance = 1 KΩ = 1000 Ω
R0 = output (collector) resistance = 2 KΩ = 2000 Ω
V0 = output voltage = 2V
∴ Resistance again = RoRi=20001000 = 2
Using, the relation
Voltage gain = current gain x resitance gain,
We get, Voltage gain Av = 100 x 2 = 200
Collector current, Ic = VoRo
= 2 V2000Ω=11000 A
= 10-3A = 1mA
Ib = base current = ?
V1 = input signal voltage = ?
Using the relation,
β = IcIb
Ib = Icβ=10−3100
= 10-5A = 10 x 10-6A
= 10 µA
Also using the relation, ‘
Av = VoVi
= VoAv=2200=1100 V
= 0.01 V

Question 10.
Two amplifiers are connected one after the other in series (cascaded). The first amplifier has a voltage gain of 10 and the second has a voltage gain of 20. If the input signal is 0.01 volt, calculate the output ac signal.
Answer:
Let Av1 and Av2 be the voltage gains of the first and second amplifier connected in series.
∴ Av1 = 10
Av2 = 20
Vi = input, A.C signal voltage = 0.01 V.
Vc = output, A.C signal voltage = ?
Let Av be the voltage gain of the cascaded amplifier.
∴ A v = Av1 x Av2
= 10 x 20 = 200

∴ using the relation,
Av = VoVi , we get,
V0 = Av x Vi = 200 x 0.01
= 2 V

Question 11.
A p-n photodiode is fabricated from a semiconductor with band gap of 2.8 eV. Can it detect a wavelength of 6000 nm?
Answer:
Here
Eg = band gap of the semiconductor
= 2.8 eV
= 2.8 x 1.6 x 10-19 J
= 4.48 x 10-19 J
= 44.8 x 10-20 J ……… (1)
Wave length of the radiation,
λ = 6000 nm = 6000 x 10-19 m
If E be the energy corresponding to this radiation, then
E = hcλ
= hcλ
= 3.31 x 10-20J ……..(2)
It is clear from (1) and (2), that the energy corresponding to 6000 nm is less than the band of the semiconductor used to fabricate photodiode, so it cannot be detected. For detection of any radiation, E > Eg.

Question 12.
The number of silicon atoms per m3 is 5 x 1028. This is doped simultaneously with 5 x 1022 atoms per m3 of Arsenic and 5 x 102 per m3 atoms of Indium. Calculate the number of electrons and holes. Given that n x = 1.5 x 1016 m-3. Is the material n – type or p – type?
Answer:
Here,
ND = 5 x 1020 atoms/m3
= donor atom density
NA= Acceptor atom density = 5 x 1020 atoms/m3
NA = 0.05 x 1022 atoms/m3
ni = 1.5 x 1016m-3
N = number of silicon atoms = 5 x 1028 m-3
Let ne and nh be the number density of electrons and holes respectively in the semiconductor = ?
∴ ND – NA = (5 – 0.05) x 1022
= 4.95 x 1022 atoms/m3
We know that
nenh = n2i ……… (1)
Also know that for the neutrality of charge in the semiconductor,
ND – NA = ne – nh
or ne – nh = ND – NA ……….(2)
From(1)
nh = n2ine ……….(3)
∴ From (2) and (3), we get
n2ine = ND – NA
or (ND – NA) ne = n2ine ……..(4)
eq (4) is quadratic equation in ne


[∴ n1 is very small, so n12 will be very small as compared to (ND – NA)2, hence can be neglected].
∴ ne = – [4.95 x 1022 + 4.95 x 1022]
= 4.95 x 1022 m-3
from (3),

Clearly as ne >> nh, i.e. electrons are majority carriers and holes are minority carriers in the given semiconductor, so it is of n-type.

Question 13.
In an intrinsic semiconductor the energy gap Eg is 1.2 eV. Its hole mobility is much smaller than electron mobility and independent of temperature. What is the ratio between conductivity at 600K and that at 300K? Assume that the temperature dependence of intrinsic carrier concentration n1 is given by
ni = n0 exp – [latex]\frac{\mathbf{E}_{\mathbf{g}}}{\mathbf{2 K}_{\mathbf{B}} \mathbf{T}}[/latex]
where n0 is a constant.
Answer:
Here, Eg= energy gap of the intrinsic semiconductor = 1.2 eV
T1 = 600K ‘
T2 = 300K
Let σ1 and σ2 be the conductivity of the semiconductor at T1, and T2repectively = ?
∴ σ1σ2 = ?
We know that the conductivity of a semiconductor is given by –
σ = 1ρ
e = e(neµe + nnµn) ……..(1)
For intrinsic semiconductor, ne = nh = ni
also µe>> un (given)
∴ eg (1) can be written as :
σ = e ni ne ……….(2)
Also it is given that
ni = n0 ee−Eg/2kBT ………(3)
From (2) and (3), we get
where σ = e n0u0 e−Eg/2kBT
= σ0 e−Eg/2kBT ………(4)
where σ0 = e n0u0 is a constant as it is independent of temperature.


From it, we conclude that the conductivity of the intrinsic semiconductor is highly affected by temperature.

Question 14.
In a p-n junction diode, the current I can be expressed as
I = I0 exp (eVKBT−1)
where I0 is called the reverse saturation current, V is the voltage across the diode and is positive for forward bias and negative for reverse bias, and I is the current through the diode, KB is the Boltzmann constant (8.6 x 10-5 eV/K) and T is the absolute temperature. If ior a given diode I0 = 5x 10-12 A and T = 300 K, then
(a) What will be the forward current at a forward voltage of 0.6 V?
(b) What will be the increase in the current if the voltage across the diode is increased to 0.7 V?
(c) What is the dynamic resistance?
(d) What will be the current if reverse bias voltage Changes from 1 V to 2 V?
Answer:
Here, kB -Boltzmann constant = 8.6 x 10-5 eVK-1
= 8.6 x 10-5 x 1.6 x 10-19jK-1
I0 = 5 x 10-12,
A = reverse saturation current.
T = 300 K.

(a) Here, V = 0.6V
forward current is given by

Now at
X = (2.718)23.255
∴ log x = 23.255 log (2.718)
= 23.255 x 0.4343 = 10.09965
∴ x = Antilog 10.0997 = 10.0997
= 1258 x 107 ………(2)
∴ From (1) and (2), we get
I = 5×1012 x (1258 x 107 – 1)
= 6290 x 105 A (neglecting one)
= 0.0629A = 0.063 A

(b) Here, V = 0.7V
Let I be the forward current when forward voltage is increased to 0.7V

log x’ = 27.1318 log e
= 27.1318 x 0.4343
= 11.7833
x’ = Antilog 11.7833
= 6072 x 108 ………..(4)
from (3) and (4), we get
I1 = 5 x 10-12 x (6072 x 108 – 1)
= 5 x 10-12 x 6072 x 108
= 30360 x 108
= 3.036 A
If ∆I be the increase in current, then
∆I = I1 – I = 3.036 – 0.063 = 2.973 A.

(c) ΔVΔI = dynamic resistance = Rd = ?
Here
∆V = 0.7 – 0.6 = 0.1V
∆I = 2.973 A
∴ Rd = ΔVΔI
= 0.12.973
= 33.636 x 10-3 Ω
= 0.0336 Ω

(d) For a change in voltage from 1 to 2V, the current will remain to saturation state,
I0 = 5 x 10-12A.
It shows that the diode possesses practically infinite resistance in reverse biasing.

Question 15.
You are given the two circuits as shown in Fig here. Show that circuit (a) acts as OR gate while the circuit (b) acts as AND gate

Answer:
In fig (a), y1 = A+B¯¯¯¯¯¯¯¯¯¯¯¯¯
and y = y1¯¯¯¯¯=A+B¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ A¯¯¯¯¯¯¯¯+B¯¯¯¯¯¯¯¯ = A + B
i.e. Y equal to A OR B
Hence fig (a) represents an OR gate and is verified by the following truth table

i.e y, is high if both the inputs are low and low if one or both the inputs are high i.e; y1 is the output of a NOR gate.
For an OR gate the output is high if one or both the inputs are high and low if one or both the inputs are low.
Now from table, we see that Y is O i.e. low when both A and B are low and is high when either A or B or both are high. Hence it is the truth table of OR gate.
(b) In fig. (b), y1 = A¯¯¯¯
y2 = B¯¯¯¯
and y = y1+y2¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
= y1¯¯¯¯¯⋅y2¯¯¯¯¯
[Using De-Morgan’s theorem A+B¯¯¯¯¯¯¯¯¯¯¯¯¯ = A¯¯¯¯⋅B¯¯¯¯ ]
= A¯¯¯¯¯¯¯¯+B¯¯¯¯¯¯¯¯ = A.B
i.e.; y equals A AND B.
Clearly Fig (b) represents an AND gate and is also verified by the following truth table.

Hence, y is the output of the NOR gate having y1 and y2 as inputs. For NOR gate the output is high if both the inputs are low and the output is low if one or both the inputs are high. Thus clearly Y represents the truth table of an AND gate for which the output is high if both the inputs are high and the output is low if one or both the inputs are low.

Question 16.
Write the truth table for a NAND gate connected as given in following figure.

Hence identify the exact logic operation carried out by this circuit
Answer:
The NAND gate shown here has only one input and one output i.e. the two inputs are shorted. For a NAND gate, the output is high if one or both the inputs are low and the output is low if both the inputs are high. Thus its truth table is given as :

It is clear that here the logic operation
Y = A¯¯¯¯ is taking place.
So this circuit carries out the operation of a NOT gate actually having the truth table.

Question 17.
You are given two circuits as shown in Fig. here which consist of NAND gates. Identify the logic operation carred out by the two circuits.
Answer:
(a) fig a, A and B are the inputs to NAND gate having y: as its output. yx is input to NAND gate acting as NOT gate i.e.
y = y1⋅y1¯¯¯¯¯¯¯¯¯¯¯¯¯ = y1¯¯¯¯¯
y1 =  A.B ¯¯¯¯¯¯¯¯¯¯¯
∴ y = A.B¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ = A. B
which is an AND operation and is explained in theJFollowing truth table.

(b) In figure (b) A and B are the inputs to the two separate NOT gates obtained from NAND gates and have their respective outputs as y1 and y2 which are inputs to another NAND gate having output y.
Thus y = y1⋅y2¯¯¯¯¯¯¯¯¯¯¯¯¯
Also y1 =  A.A ¯¯¯¯¯¯¯¯¯¯¯ = A¯¯¯¯
and y2 = B¯¯¯¯.B¯¯¯¯ = B¯¯¯¯
y = A¯¯¯¯¯¯¯¯ . B¯¯¯¯¯¯¯¯ = A¯¯¯¯¯¯¯¯ + B¯¯¯¯¯¯¯¯ (by using De-Morgan’s theorem) = A + B
which is an OR operation.
Thus this figure represents an OR gate.
The operations carried out by this circuit are shown in the , following truth table.

For OR gate the output is high if one or both the inputs are high and the output is low if both the inputs are low.
Thus the table is correct with A and B as inputs and y as output.

Question 18.
Write the truth table for circuit given in Fig. below consisting of NOR gates and identify the logic operation (OR, AND, NOT) which this circuit is performing.

(Hint – A = 0, B = 1, then A and B inputs of second NOR gate will be O and hence y = 1. Similarly work out the values of y for other combinations of A and B. Compare with truth of OR, AND, NOT gates and find the correct one.
Answer:
Here, the above figure represents a NOR gate followd by a NOT gate obtained from NOR gate. Thus the output y, will represent the output of a NOR gate and is fed to NOT gate. Thus we get an OR gate as shown in the truth table and the Boolean operations carried out are also given here.

y = y1¯¯¯¯¯ = A+B¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ = A + B (∵ A¯¯¯¯¯¯¯¯ = A)
Thus A, B and Y represents the table of OR gate so it is the circuit-‘ requivalent to OR gate i.e.; when A = B = 0, then yx will be high because for a NOR gate the output is high if both the inputs are low and the output is low if one or both the inputs are high.
Similarly when A = 0, B = 1, y1 = 0
A = 1, B = 0, y1 = 0
and A = B = 1, y1 = 0.

Question 19.
Write the truth table for the circuits given in figure consisting of NOR gates only. Identify the logic operations (OR, AND, NOT) performed by the two circuits.

Answer:
(a) Here, fig (a) represents a NOR gate having its two inputs shorted followed by a NOT gate. The Boolean expression and Truth Table are given below.
y = A¯¯¯¯
For a NOR gate, the output is low if one or both the inputs are high and the output is high if both the inputs are low.
Thus clearly this circuit carries out the logic operation of a NOT gate.

(b) This circuit shows how NOR gate acts as an AND gate. Here for 1st two gates the input terminals are joined together and act as NOT gates which invert the inputs A and B. Their output is now jointly fed to the NOR gate. The output so obtained is that of the AND gate. The truth table for the circuit and the Boolean expressions are given below.

Thus with inputs as A and B and output as y: we get the truth table of AND gate
y = A+B¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ =  A ¯¯¯¯¯¯¯¯¯¯¯¯⋅B¯¯¯¯¯¯¯¯ = A. B